Description

About the Company:

Cadence is a global leader in electronic design automation (EDA), empowering engineers and designers to build next-generation technologies. With a strong focus on innovation, Cadence enables clients to develop complex and advanced systems that are shaping the future of technology.

Job Responsibilities:

• Perform hands-on layout of various analog IP blocks such as OpAmps, Bandgaps, Data Converters, LDOs, PLLs, and High-Speed SerDes.
• Understand and manage layout effects on circuits including speed, capacitance, power, and area.
• Apply advanced analog layout techniques like matching, shielding, floorplanning, and chip-level IP integration.
• Work with advanced technology nodes (28nm and below).
• Collaborate with circuit designers and integrate analog IPs in deep submicron (DSM) technologies.
• Contribute to layout automation and scripting tasks.
• Demonstrate strong communication, documentation, and presentation skills.
• Use strong analytical and problem-solving capabilities in a cross-functional team environment.

Key Technology Skills:

Analog layout, SerDes, OpAmps, Bandgaps, Data Converters, LDO, PLL, DSM methodology, Matching techniques, Shielding, Scripting, Automation, 28nm and below technologies

Requirements:

• Bachelor’s or Master’s degree in Electrical or Electronics Engineering (BE/BTech/ME/MS/MTech)
• Hands-on experience in analog layout (preferably 28nm and below nodes)
• Strong knowledge of analog layout techniques and DSM-related issues
• Scripting/automation experience is a plus
• Strong analytical, documentation, and problem-solving skills
• Proven team player with good communication and collaboration abilities

Behavioral Skills Required:

• Excellent verbal, written, and presentation skills
• Ability to collaborate with cross-functional and cross-geography teams
• Ability to think creatively and explore unconventional solutions
• Committed to integrity while striving for excellence